Source library
Memory region allocator — red team v2 (multi-reviewer)
docs/ps1/memory-region-allocator-red-team-v2.md
This is the website shelf page for docs/ps1/memory-region-allocator-red-team-v2.md.
It exists because the project has hundreds of Markdown files and the website
should not pretend the interesting work only happened in the polished essays.
Why this file matters
Active PS1 reference. This is active engineering documentation for the PS1 port. It is close enough to the code that stale claims here become real bugs.
Companion to memory-region-allocator-plan.md (v3). Where the v1 red team was a single technical pass focused on bugs in the architecture, v2 is a panel review with five distinct perspectives. Each reviewer reads the v3 plan independently and flags concerns from their own lens. The synthesis at the end pulls the top items the team agrees are blocking.
File facts
| Field | Value |
|---|---|
| Source path | docs/ps1/memory-region-allocator-red-team-v2.md |
| Lines | 457 |
| Approx. words | 3207 |
| Code fences | 0 |
Outline
- Memory region allocator — red team v2 (multi-reviewer)
- Reviewer 1 — Pat, Embedded Systems Veteran
- 🔴 P1. Interrupt-context allocation is not addressed
- 🟠 P2. BSS clear at boot is now a 1.2 MB write pass
- 🟠 P3. The pack-header scan touches the CD at boot
- 🟠 P4. 8-byte alignment is overkill on MIPS R3000A
- 🟠 P5. “Why three regions, not 39 fixed pools?”
- 🟡 P6. DCache and write-buffer behavior
- 🟡 P7. “Allocator” reads like 400 LOC; my budget says 800
- Reviewer 2 — Sarah, Site Reliability / Operations
- 🔴 S1. There is no rollback story for Phase 2
- 🔴 S2. PS1 has no telemetry channel from the field
- 🟠 S3. The grep gate is reactive, not preventive
- 🟠 S4. “Independently shippable phases” is asserted, not demonstrated